A commercial universal asynchronous receiver transmitter (UART) with a built-in self test (BIST) circuit is proposed. In this paper; VHDL is selected for realizing the RTL based UART and BIST system. A pseudorandom test pattern generator, linear feedback shift register (LFSR), is chosen to produce the testing stream. The proposed VHDL programs are simulated by ModelSim and the code coverage is also considered. In addition, the synthesis tools are used for verifying its synthesizability. The analysis results show that 1673 gates are totally used in the implementation of this design, and the capability of global code coverage has up to 95.69%.
