文化大學機構典藏 CCUR:Item 987654321/26355
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    Please use this identifier to cite or link to this item: https://irlib.pccu.edu.tw/handle/987654321/26355


    Title: 使用傳輸線時段控制和平行計算於金氧半電晶體加上連接線之基於STWR 演算法電路模擬
    STWR Algorithm-based MOSFET and Interconnect Simulation Using Transmission Line Time Step Control and Parallel Computing
    Authors: 陳俊榮
    蔡昌隆
    李志仁
    周立平
    楊泰寧
    孫振東
    Contributors: 資訊工程學系
    Keywords: 電路模擬
    傳輸線
    基於STWR 演算法
    連接線模擬
    平行計算
    Date: 2012-06
    Issue Date: 2013-12-03 14:49:03 (UTC+8)
    Abstract: 此篇論文討論了使用加強型的Selective-tracing Waveform Relaxation 演算法(STWR
    Algorithm)進行現代電路設計界常遇到的大型MOSFET 和有損交連傳輸線電路之模擬,我們在STWR 中採用了一個全時域的的傳輸線計算器以計算連接線,除了描述加強STWR的方法,也描述了加速傳輸線計算器的做法:包括傳輸線時段控制和平行計算。所有提出的方法都加以實做且進行實際的電路模擬,模擬結果證實了所提方法的優越性能。
    The large-scale circuit simulation for MOSFET circuits with interconnects has been investigated in this paper. Our strategy is to use the reinforced Selective-tracing Waveform Relaxation (STWR) algorithm that equipped with a transmission line calculator. Strengthening methods for STWR and accelerating methods for the embedded transmission line calculation has been proposed, including the time step control scheme and parallel computing. All proposed methods have been implemented and tested to justify their superior performance.
    Relation: 華岡工程學報 n.29 p.165-172
    Appears in Collections:[College of Engineering] Chinese Culture University Hwa Kang Journal of Engineering

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